AMD Launches Versal Premium Gen 2 for Edge AI Push

Key Moments

AMD Expands Versal Premium Portfolio With In-Package Memory

AMD has rolled out its Versal Premium Gen 2 Memory on Package (MoP) devices, a new extension of its adaptive SoC lineup that focuses on maximizing memory bandwidth and shrinking system footprints. Announced on June 30, 2026, the MoP architecture incorporates up to 32GB of LPDDR5X memory directly into the chip package.

This integrated design provides memory bandwidth of up to 288GB/s and can reduce required board area by up to 60% compared with conventional external memory configurations. AMD is positioning the technology for use cases that demand both high throughput and compact layouts, including data center deployments, telecom networks, and defense-related platforms.

The MoP devices build on the broader Versal Premium Gen 2 platform, which first appeared in 2024, by adding tighter integration and pre-validated subsystems. The company is emphasizing that this approach is intended to shorten development timelines and reduce design uncertainty for system engineers.

Technical Capabilities and Security Enhancements

Versal Premium Gen 2 MoP devices incorporate interfaces for CXL 3.1 and PCIe 6.0, supporting data transfer rates up to 64Gb/s. These high-speed connectivity options are designed to enable rapid movement of data between accelerators, CPUs, storage, and other system components.

On the security front, the MoP family includes PCIe Integrity and Data Encryption (IDE) as well as integrated memory encryption. These measures are targeted at rising security requirements in both edge and enterprise settings, where protecting data in motion and at rest has become a core design criterion.

AMD has also engineered the MoP products for extended availability, specifying a lifecycle of more than 15 years. By avoiding reliance on external high-bandwidth memory (HBM) devices, the company aims to reduce exposure to potential HBM supply constraints, a key consideration for long-lived, mission-critical and AI-oriented installations.

Design and Form Factor Implications

Embedding LPDDR5X memory inside the package serves not only as a performance upgrade but as a change in system architecture. By removing the requirement for external high-speed memory routing, AMD is aiming to simplify board design, lower bill-of-materials costs, and reduce layout complexity for equipment manufacturers.

The pre-validated nature of the memory subsystem is intended to help customers bring products to market faster, particularly in competitive fields such as 5G infrastructure, aerospace electronics, and computational storage. The company highlights that this integration can relieve some of the validation and signal integrity challenges typically associated with high-speed external memory.

The compact footprint of the MoP platform is also aligned with newer hardware formats, including Enterprise and Datacenter Standard Form Factor (EDSFF) and 3U VPX systems. This compatibility is designed to enable higher system density and more efficient use of constrained chassis and rack environments.

Deployment Timeline and Market Positioning

Standard Versal Premium Gen 2 devices are already in the market, while the MoP configurations are scheduled to begin sampling at the end of 2026. Volume production for the MoP variants is planned for the second half of 2027, establishing a roadmap for integration into upcoming system designs.

For market participants, AMD is presenting this announcement as a reinforcement of its position in adaptive SoCs as workloads trend toward higher memory intensity. The company is also advancing its EPYC CPU portfolio, including “the recent rollout of its 256-core 2nm processors,” which it frames as complementary progress for data-centric and AI-heavy applications.

Overall, the Versal Premium Gen 2 MoP introduction underscores AMD’s focus on aligning product development with evolving requirements in bandwidth, density, and lifecycle support, which the company expects to strengthen its standing in the semiconductor industry.